Trapezoidal waveform generator circuit

ABSTRACT

There is disclosed a ramp generator responsive to a pulse-type signal for providing an output signal which linearly ramps between two voltage values. The ramp generator includes an operational amplifier integrator circuit and a pair of feedback regulating paths around the integrator circuit to regulate the output voltage values.

United States Patent 11 1 Bruckner et a1.

TRAPEZOIDAL WAVEFORM GENERATOR CIRCUIT Inventors: Ronald L. Bruckner,Dayton; Don P.

Rex, Springboro, both of Ohio Assignee: The National Cash RegisterCompany, Dayton, Ohio Filed: June 9, 1972 Appl. No.: 261,272

US. Cl 307/261, 307/228, 307/229, 307/263, 328/127 Int. Cl. H03k 5/00Field of Search 307/228, 229, 261, 307/263; 328/127 References CitedUNlTED STATES PATENTS 4/1967 Flynn et a1 307/228 x Nov. 13, 19733,586,874 6/1971 Ferro 307/228 3,125,694 3/1964 P511113 307/22113,444,394 5/1969 Colvson 307/228 x 3,453,452 7/1969 $1311.11 307/2633,543,049 11/1970 Farnsworths 307/228 3,548,219 12/1970 Lawrie, 11. etal 307/263 Primary Examiner-Stanley D. Miller, Jr. Attorney-J. T.Cavender et al.

[57] ABSTRACT There is disclosed a ramp generator responsive to apulse-type signal for providing an output signal which linearly rampsbetween two voltage values. The ramp generator includes an operationalamplifier integrator circuit and a pair of feedback regulating pathsaround the integrator circuit to regulate the output voltage values.

6 Claims, 2 Drawing Figures TRAPEZOIDALWAVEFORM GENERATOR CIRCUIT Thisinvention relates to an electrical circuit for generating a ramp voltageand more particularly to a circuit utilizing an operational amplifier aspart of an integrator circuit and regulating feedback for generating theramp voltage.

In many machines it is common to have digital pulsetype signals causemotor driven apparatus to operate. As used herein, the term pulse-typesignal means any signal in which the voltage changes in a substantiallyinstantaneous manner from one value to another value. Pulse-type signalis-not intended to limit the time during which the voltage remains ateither value, or the number of times it changes, but only the timerequired for the change. One example of such motor-driven apparatus isthe automatic line finder circuit used with a printing device which iscontrolled by pulse-type signals. In this type of apparatus, it isnecessary that the acceleration and deceleration of the motor be closelycontrolled. Where the pulse-type signals normally associated with theapparatus are used to turn the motor on or off, the motor becomes verytemperature and parameter sensitive. It has been found that if the motoris turned on and off using a ramp signal, control of the accelerationand deceleration becomes much easier. As used herein, the term rampsignal means any signal in which the voltage changes from one to anothervalue in a time substantially longer than the time required for thechange in a pulse-type'signal. Further, if the voltage change of theramp signal is linear with respect to time, improved control ispossible.

Many ramp generator circuits are known to exist. The simplest rampgenerator is merely a capacitor which is slowly changed to an operatingpotential. However, this providesa nonlinear ramp voltage. An integratorcircuit provides a linear ramp voltage and may be constructed byconnecting a capacitor between the output and inverting input of anoperational amplifier. One such integrator is shown in U.S. Pat. No.3,586,874 entitled Integrated Circuit Periodic Ramp Generator by ArmandP. Ferro.

When using a ramp generator circuit to drive a mo tor, it is furtherdesirable to regulate the voltages applied to the motor. This furtheradds to the ease of controlling the apparatus the motor is driving.

In accordance with one aspect of this invention there is provided acircuit which, in response to a pulse-type signal, provides a voltagewhich linearly ramps between a first voltage value and a second voltagevalue in response to the leading edge of the pulse-type signal and whichlinearly ramps between the second voltage value and the first voltagevalue in response to the trailing edge of the pulse-type signal. Thecircuit comprises inverting amplifying means having an input and anoutput with the pulse-type signal being applied to the input thereof.Further, the circuit includes capacitance means coupled between theinput and the output. In addition there is a first switching meanshaving first and second terminals which are respectively direct currentcoupled to the input and the output, with the first switching meansbecoming conductive when the voltage at the output becomes the firstvalue. Similarly, there is included a second switching means havingfirst and second terminals which are respectively direct current coupledto the input and the output, with the sec- 0nd switching means becomingconductive when the voltage at the output becomes the second value.

A detailed description of one preferred embodiment of this inventionwill hereinafter be given with reference being made to the followingFIGURES, in which:

FIG. 1 is a circuit diagram of a ramp generator utilizing thisinvention; and

FIGS. 2A and 2B show two voltage waveforms representing the input andoutput voltage of the circuit shown in FIG. 1.

Referring now to FIG. 1, a ramp generator circuit 10 is shown, andincludes a pair of input terminals 12 and 14, between which a pulse-typeinput signal V, having polarities of -i-V volts and zero volts isapplied. The input signal V, is shown in FIG. 2A, where it is seen thatthe voltage is zero volts between times 1 and t and +V volts otherwise.In this embodiment, it is desired that the motor (not shown) be turnedon at time t, and be turned off at time t with predictable accelerationand deceleration times respectively following times 1. and t For'theinput voltage V shown in FIG. 2A, earlier occurging time t, is theleading edge and later occurring time t is the trailing edge of thepulse-type input signal. Ramp generator circuit also includes two outputterminals 16 and 18 between which the ramping output voltage V isprovided. Output voltage V alternates between zero volts and +V voltswith a linear ramping voltage between these two values. Output voltage Vis shown in FIG. 2B where it is seen that the value thereof linearlyincreases between times t and t and linearly descreases between times tand t Input terminal 14 is coupled to a point of reference potential,such as ground. Input terminal 12 is coupled to the cathode of a diode20, the anode of which is coupled to the anode of a diode 22. Thejunction of the anodes of diodes 20 and 22 is coupled through a resistor24 to a point of positive voltage +V. The cathode of diode 22 is coupledto the anode of a diode 26, the cathode of which is coupled to the baseof an NPN transistor 28. The junction of the cathode of diode 26 and thebase of transistor 28 is coupled through a resistor 30 to ground. Theemitter of transistor 28 is also coupled to ground.

' The collector of transistor 28 is coupled through a resistor 32 to thebase of a PNP transistor 34. The emitter of transistor 34 is coupledthrough a resistor 36 to a point of positive voltage +V. The emitter oftransistor 34 is also coupled through a resistor 38 to the base oftransistor 34. The collector of transistor 34 is coupled through aresistor 40 to a point of negative voltage -V. The collector oftransistor 34 is also coupled to the cathode of a diode 42, the anode ofwhich is coupled to an anode of a zener diode 44. The cathode of zenerdiode 44 is coupled to ground. The junction of the anode of diode 42 andzener diode 44 is coupled through a resistor 46 to the point of negativepotential V.

The collector of transistor 34 is also coupled through junction A to oneend of an input resistor 48, the other end of which is coupled to theinverting input of an operational amplifier 50. The noninverting inputof operational amplifier 50 is coupled to ground. Operational amplifier50 may be any amplifier exhibiting a high gain which would exceed 1000,but which may be many times this value and further which has anextremely high input impedance. One operational amplifier which has beenfound acceptable is the p, A709 operational amplifier which may bepurchased from several different sources. A description ofa ,u, A709operational amplifier is given in the Oct. 16, 1967 issue of ElectronicsMagazine on pages 86-93.

The output of operational amplifier 50 is coupled through a resistor 52to the inverting input thereof. A capacitor 54 is coupled in parallelwith resistor 52. The combination of operational amplifier 50, resistors48 and 52 and capacitor 54 is an integrator circuit 55 in which thevoltage appearing at the output of operational amplifier 50 is theintegral of the voltage at junction A. Thus, where a voltage at junctionA is a pulsetype voltage which increases from zero volts to a positivevoltage substantially instantaneously, the output voltage fromoperational amplifier 50 will be a linear ramp voltage. The slope of theramp will be determined by the time constant of resistor 48 andcapacitor 54. The gain of the integrator will be determined by the ratioof resistors 52 and 48.

The output of operational amplifier 50 is coupled to the cathode of adiode 56, the anode of which is coupled to the cathode of a diode 58.The anode of diode 58 is coupled through a resistor 60 to the source ofpositive voltage +V. The junction of resistor 60 and the anode of diode58 is coupled to output terminal 16. Output terminal 18 is coupled toground.

The output of operational amplifier 50 is also coupled to the emitter ofa PNP transistor 62. The collector of transistor 62 is coupled tojunction A. The base of transistor 62 is coupled to the cathode of azener diode 64, the anode of which is coupled to ground. The junctionbetween the cathode of zener diode 64 and the base of transistor 62 iscoupled through a resistor 66 to a point of positive potential +V. Theoutput of operational amplifier 50 is further coupled to the emitter ofan NPN transistor 68. The collector of transistor 68 is coupled to thecathode of a diode 70, the anode of which is coupled to junction A. Thebase of transistor 68 is coupled to the cathode of a diode 72, the anodeof which is coupled to ground.

The operation of ramp generator circuit will now be explained. When theinput voltage V, changes from the positive value t-V volts to zero voltsat time t,, transistor 28 becomes nonconductive. This, in turn, causestransistor 34 to become nonconductive and the collector of transistor 34becomes negative. The negative voltage at the collector of transistor 34is determined by the voltage drop across the zener diode 44 and diode42. This negative voltage, when applied between junction A and ground,causes the output of operational amplifier 50 to begin ramping positive,with a slope determined by the values of the resistor 48 and capacitor54. When, at time 1 the voltage at the output of operational amplifier50 reaches the voltage V determined by zener diode 64 and thebase-emitter voltage drop of transistor 62, transistor 62 beginsconducting. This allows positive voltage to be fed back to junction Athereby forcing junction A more positive and causing the ramp voltage tolevel off at V Thus, whenever the output voltage of the operationalamplifier 50 exceeds the V threshold voltage, transistor 62 becomesconductive to make the input voltage less negative, and whenever theoutput voltage of operational amplifier 50 is less than the V thresholdvoltage, transistor 62 becomes nonconductive and the output voltage willrise to the V threshold voltage. Thus, transistor 62 regulates theoutput voltage. The voltage between output terminals 16 and 18 will bethe voltage between the output of operational amplifier 50 and ground,plus the voltage drop across diodes 56 and 58.

The output voltage from operational amplifier 50 will remainsubstantially constant until time 2 when the input voltage V, changesfrom zero volts to r-V volts. In this case, transistor 28 becomesconductive, causing transistor 34 to become conductive. The values ofresistors 36 and 40 are selected so that the normal voltage expected atthe collector of transistor 34 will exceed the voltage across zenerdiode 64 and the collector-base junction of transistor 62. However,zener diode 64 and the collector base junction of transistor 62 limitthe voltage at the collector of transistor 34, and hence at junction A,to this positive value. With this voltage at junction A, the output ofoperational amplifier 50 begins linearly ramping in a negative directiontowards zero volts with a slope determined by resistor 48 and capacitor54. This action continues until the voltage at the output of operationalamplifier 50, and hence at the emitter of transistor 68, falls below thevoltage drop across diode 72 and the base-emitter junction of transistor68, which will be in the order of l .2 volts. This is the time t 4 inFIG. 2B and at this time, transistor 68 begins conducting and junction Abecomes more positive due to the current flowing through diode andconductive transistor 68. In this manner transistor 68 regulates the lowvoltage output of operational amplifier 50. In this case the outputvoltage between terminals 16 and 18 will be approximately zero volts dueto the voltage drop of approximately 1.2 volts across diodes 56 and 58.

In one circuit which has been constructed according to this embodiment,the following component values were used:

Resistor 24-8.2K ohm Resistor 30-1 .5K ohm Resistor 326.8K ohm Resistor36560 ohm Resistor 38-7.SK ohm Resistor 403.3K ohm Resistor 46-1 .lK ohmResistor 48-24K ohm Resistor 52-l.5M ohm Resistor 60--2OK ohm Resistor66-].2K ohm Diode 20--IN907 What is claimed is:

1. A circuit which in response to a pulse-type signal provides a voltagewhich linearly ramps between a first voltage value and a second voltagevalue in response to the leading edge of said pulse-type signal andwhich linearly ramps between said second voltage value and said firstvoltage value in response to the trailing edge of said pulse-typesignal, said circuit comprising:

inverting amplifying means having an input and an output, saidpulse-type signal being applied to said input;

capacitance means coupled between said input and said output;

first switching means having two terminals respectively direct currentcoupled to said input and said output, wherein said first switchingmeans includes a solid state device having first and second mainelectrodes, each coupled respectively to one of said two terminalsthereof and a control electrode coupled to a point of first fixedpotential, said solid state device of said first switching meansallowing current to flow between said output and said input whenever thevoltage as said output becomes said first voltage value; 5

second switching means having two terminals respectively direct currentcoupled to said input and said output, wherein said second switchingmeans includes a solid state device having first and second mainelectrodes each coupled respectively to one of said two terminalsthereof and a control electrode coupled to a point of second fixedpotential, said solid state device of said second switching meansallowing current to flow between said input and said output whenever thevoltage at said output becomes said second voltage value;

wherein said solid state device of said first switching means is a PNPtransistor having a base, an emitter and a collector, said base beingcoupled to said point of first fixed potential, said emitter beingcoupled to said output, and said collector being coupled to said input;and

wherein said solid state device of said second switching means is an NPNtransistor having a base, an emitter, and a collector, said base beingcoupled to said point of second fixed potential, said emitter beingcoupled to said output, and said collector being coupled to said input.

2, The invention according to claim 11:

wherein said amplifying means is an operational amplifier; and

wherein said circuit further includes a first resistor coupled betweensaid input and said output and a second resistor coupled between saidinput and the terminals of said first and second switching means 35remote from said output.

3. The invention according to claim 2 wherein said input signal isapplied to said amplifying means through said second resistor.

slope of said ramp between said first and second voltage values andbetween said second and first voltage values is determined by the valuesof said capacitance means and said second resistor.

5. The invention according to claim 1 wherein said inverting amplifyingmeans includes first and second resistors and an operational amplifierhaving an output which is coupled to said amplifying means output and aninput, said first resistor being coupled between said operationalamplifier input and output, and said second resistor being coupledbetween said inverting amplifying means input and the inverting input ofsaid operational amplifier.

6. A circuit comprising:

an operational amplifier having an inverting input, a

noninv'erting input, and an output;

a capacitor coupled between said output and said inverting input;

a first resistor coupled between said output and said inverting input;

a second resistor having a first end coupled to said inverting input andfurther having a second end constituting an input to said circuit;

a PNP transistor having a base, an emitter and a collector;

means for coupling said emitter to said output;

means for coupling said collector to said second end of said secondresistor; I

means for coupling said base to a point of first potential;

an NPN transistor having a base, an emitter and a collector;

means for coupling said emitter to said output;

means for coupling said collector to said second end of said secondresistor;

means for coupling said base to a point of second potential; and

means for applying a pulse type voltage to said second end of saidsecond resistor.

UNITED STATES PATENT OFFICE I CERTIFICATE OF CORRECTION Patent N3.712.533 Dated November 13 1972 Inventofls) Ronald L. Bruckner & Don'P. Rex

It is certified that error appers in the above-identified patent andthat said Letters Patent are hereby corrected as shown below:

Column 5, line 29, delete "ll and substitute --l--.

' Signed and sealed this llpth day of May 19714..

(SEAL) Attest':

EDWARD M.FLETGJ:EI',JR. C'. Z'IARSHALL DAMN Attesting OfficerCommissioner of Patents

1. A circuit which in response to a pulse-type signal provides a voltagewhich linearly ramps between a first voltage value and a second voltagevalue in response to the leading edge of said pulse-type signal andwhich linearly ramps between said second voltage value and said firstvoltage value in response to the trailing edge of said pulse-typesignal, said circuit comprising: inverting amplifying means having aninput and an output, said pulse-type signal being applied to said input;capacitance means coupled between said input and said output; firstswitching means having two terminals respectively direct current coupledto said input and said output, wherein said first switching meansincludes a solid state device having first and second main electrodes,each coupled respectively to one of said two terminals thereof and acontrol electrode coupled to a point of first fixed potential, saidsolid state device of said first switching means allowing current toflow between said output and said input whenever the voltage as saidoutput becomes said first vOltage value; second switching means havingtwo terminals respectively direct current coupled to said input and saidoutput, wherein said second switching means includes a solid statedevice having first and second main electrodes each coupled respectivelyto one of said two terminals thereof and a control electrode coupled toa point of second fixed potential, said solid state device of saidsecond switching means allowing current to flow between said input andsaid output whenever the voltage at said output becomes said secondvoltage value; wherein said solid state device of said first switchingmeans is a PNP transistor having a base, an emitter and a collector,said base being coupled to said point of first fixed potential, saidemitter being coupled to said output, and said collector being coupledto said input; and wherein said solid state device of said secondswitching means is an NPN transistor having a base, an emitter, and acollector, said base being coupled to said point of second fixedpotential, said emitter being coupled to said output, and said collectorbeing coupled to said input.
 2. The invention according to claim 11:wherein said amplifying means is an operational amplifier; and whereinsaid circuit further includes a first resistor coupled between saidinput and said output and a second resistor coupled between said inputand the terminals of said first and second switching means remote fromsaid output.
 3. The invention according to claim 2 wherein said inputsignal is applied to said amplifying means through said second resistor.4. The invention according to claim 2 wherein the slope of said rampbetween said first and second voltage values and between said second andfirst voltage values is determined by the values of said capacitancemeans and said second resistor.
 5. The invention according to claim 1wherein said inverting amplifying means includes first and secondresistors and an operational amplifier having an output which is coupledto said amplifying means output and an input, said first resistor beingcoupled between said operational amplifier input and output, and saidsecond resistor being coupled between said inverting amplifying meansinput and the inverting input of said operational amplifier.
 6. Acircuit comprising: an operational amplifier having an inverting input,a noninverting input, and an output; a capacitor coupled between saidoutput and said inverting input; a first resistor coupled between saidoutput and said inverting input; a second resistor having a first endcoupled to said inverting input and further having a second endconstituting an input to said circuit; a PNP transistor having a base,an emitter and a collector; means for coupling said emitter to saidoutput; means for coupling said collector to said second end of saidsecond resistor; means for coupling said base to a point of firstpotential; an NPN transistor having a base, an emitter and a collector;means for coupling said emitter to said output; means for coupling saidcollector to said second end of said second resistor; means for couplingsaid base to a point of second potential; and means for applying a pulsetype voltage to said second end of said second resistor.